Cache-Persistence-Aware Response-Time Analysis for Fixed-Priority Preemptive Systems
Ref: CISTER-TR-160503 Publication Date: 5 to 8, Jul, 2016
Cache-Persistence-Aware Response-Time Analysis for Fixed-Priority Preemptive Systems
Ref: CISTER-TR-160503 Publication Date: 5 to 8, Jul, 2016Abstract:
A task can be preempted by several jobs of higher
priority tasks during its response time. Assuming the worst-case
memory demand for each of these jobs leads to pessimistic worstcase response time (WCRT) estimations. Indeed, there is a big
chance that a large portion of the instructions and data associated
with the preempting task τj are still available in the cache when
τj releases its next jobs. Accounting for this observation allows
the pessimism of WCRT analysis to be significantly reduced,
which is not considered by existing work.
The four main contributions of this paper are: 1) The concept
of persistent cache blocks is introduced in the context of WCRT
analysis, which allows re-use of cache blocks to be captured,
2) A cache-persistence-aware WCRT analysis for fixed-priority
preemptive systems exploiting the PCBs to reduce the WCRT
bound, 3) An multi-set extension of the analysis that further
improves the WCRT bound, and 4) An evaluation showing that
our cache-persistence-aware WCRT analysis results in up to 10%
higher schedulability than state-of-the-art approaches.
Document:
28th Euromicro Conference on Real-Time Systems (ECRTS 2016).
Toulouse, France.
Notes: Outstanding Paper Award
Record Date: 9, May, 2016