Response time analysis of hard real-time tasks sharing software transactional memory data under fully partitioned scheduling
Ref: CISTER-TR-160408 Publication Date: 23 to 25, May, 2016
Response time analysis of hard real-time tasks sharing software transactional memory data under fully partitioned scheduling
Ref: CISTER-TR-160408 Publication Date: 23 to 25, May, 2016Abstract:
Software transactional memory (STM) is a synchronisation paradigm which improves the parallelism and composability of modern applications executing on a multi-core
architecture. However, to abort and retry a transaction multiple
times may have a negative impact on the temporal characteristics
of a real-time task set. This paper addresses this issue: It provides
a framework in which an upper-bound on the worst-case response
time of each task is derived, assuming that tasks are scheduled
by following either the Non-Preemptive During Attempt (NPDA),
Non-Preemptive Until Commit (NPUC) or Stack Resource Policy
for Transactional Memory (SRPTM) policy.
António Barros
Patrick Meumeu Yomsi
Luis Miguel PinhoDocument:
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Download11th IEEE International Symposium on Industrial Embedded Systems (SIES 2016).
Krakow, Poland.
Record Date: 29, Apr, 2016
Short links for this page: www.cister-labs.pt/docs/cister_tr_160408 www.cister-labs.pt/docs/1207